Job Location: Santa Clara CA

NovuMind is a startup co-located in Silicon Valley and Beijing. Our mission is to eliminate the existing barriers of artificial intelligence deployment, so that companies of all sizes, in all industry sectors, can unleash the full power of AI. Centered around our AI chip, our full stack solutions of deep learning enable AI in products and services from embedded to cloud. We are looking for an ASIC Design Verification Engineer in our Santa Clara, CA office. Job Function Develop verification methodology and implement test bench components. Develop comprehensive test plan and implement test cases. Verify design in chip and unit level environment using directed and constrained random testing, assertion-based verification, formal analysis, and functional verification. Write functional cover groups and cover points for coverage closure. Perform RTL code coverage, assertion coverage, functional coverage and gate level simulations. Drive and adopt new verification methodologies and flows for efficiency improvements. Work with ASIC Design, Validation and SW teams to resolve issues in module integration and usage. Minimum Requirements Bachelor’s or above degrees required. Master/PhD preferred. Major in CS, CE, or EE 3-12 Years Experience in design verification (developing test plan, test bench, tests, assertions, functional & code coverage, debugging tests and designs).…More DetailsASIC Design Verification Engineer

NovuMind is a startup co-located in Silicon Valley and Beijing. Our mission is to eliminate the existing barriers of artificial intelligence deployment, so that companies of all sizes, in all industry sectors, can unleash the full power of AI. Centered around our AI chip, our full stack solutions of deep learning enable AI in products and services from embedded to cloud. We are looking for an ASIC Design Engineer (SOC) in our Santa Clara, CA office. Duties & Responsibilities Responsible for System on Chip (SoC) logic design. Design microprocessor, memory controller, on-chip interconnect, power and real time controller, interface and IP sub-systems. Perform sub-system and chip level integration. Perform micro architecture design/specification, RTL development and integration. Perform linting checks, simulation, clock domain crossing check, synthesis and debug timing, at module level and chip level. Perform conformal low power check and formal verification (Logic Equivalence Checking). Work with system architects on performance analysis and improvements. Work together with verification and system teams, provides inputs on test plan and firmware implementation. Perform performance, power, area trade off analysis to achieve optimal logic efficiency. Essential Qualifications Master/PhD degrees required in Computer Science, Computer Engineering or Electrical Engineering Verilog/System Verilog language 5-12 years of…More DetailsASIC Design Engineer (SoC)

NovuMind is a startup co-located in Silicon Valley and Beijing. Our mission is to eliminate the existing barriers of artificial intelligence deployment, so that companies of all sizes, in all industry sectors, can unleash the full power of AI. Centered around our AI chip, our full stack solutions of deep learning enable AI in products and services from embedded to cloud. We are looking for an ASIC Design Engineer (Deep Learning) in our Santa Clara, CA office. Duties & Responsibilities Responsible for neural network engine design. Design computer arithmetic and data path circuits for convolution neural networks. Perform micro architecture design, write specification, and implementation RTL. Perform linting checks, module level simulation, synthesis and debug timing. Perform complexity trade off analysis, and computer arithmetic optimization Work with scientists on algorithm improvement. Work with design verification and system teams, provide inputs on test plan and firmware implementation. Perform performance, power, area trade off analysis to achieve optimal logic efficiency. Essential Qualifications Master/PhD degrees required in Computer Science, Computer Engineering, Electrical Engineering Verilog/System Verilog language 2-12 years of industry experience. in one or more fields below: Digital Signal Processing (FIR filters, FFT transforms, encoder/decoders etc.) and Computer Arithmetic Circuits Artificial Neural Networks,…More DetailsASIC Design Engineer (Deep Learning)